1. Field of the Invention
This application relates generally to integrated circuit semiconductor devices, and, more specifically, to high voltage switches.
2. Background Information
In an integrated circuit, it is common to need a circuit to provide a voltage from a source to an output in response to an input signal. An example is a word line select circuit of in a non-volatile memory. In such a circuit, a relatively high programming voltage is supplied to a word line in response to an input signal at the device to device logic level. For example, in fairly typical values for a NAND type FLASH memory, 10-30V is provided on a word line in response to an input going from ground to “high” value of 3-5V. Such level shifters that are capable of handling such high voltages find use in multiple places in the peripheral circuitry of programmable non-volatile memories. To improve the operation of the circuit, it is important that the voltage on the output reaches its full value quickly when enabled and also that level shifter turns off quickly when disabled.
Many designs exist for such switches. A number of common designs use an NMOS transistors and a local charge pump to raise the gate voltage values used to turn on the transistor and pass the high voltage from the source to the output. Due to the body bias of the NMOS transistors and charge pump ramping speed, these switches generally take a relatively long time to reach the passing voltage level need to pass the full high voltage. These problems are aggravated by both higher programming voltage level needed and lower device supply voltages as these combine to make it harder to pump efficiently and timely due to body effects of NMOS transistors in the charge pump. Consequently, there is an ongoing need for level shifter circuits capable of handling high voltages and having a quick response when enabled and disabled.